1. Field of the Invention
Embodiments of the present invention generally relate to a method of forming a gate dielectric. More particularly, embodiments of the invention relate to a method of forming a silicon oxynitride (SiOxNy) gate dielectric.
2. Description of the Related Art
Integrated circuits are composed of many, e.g., millions, of devices such as transistors, capacitors, and resistors. Transistors, such as field effect transistors, typically include a source, a drain, and a gate stack. The gate stack typically includes a substrate, such as a silicon substrate, a gate dielectric, such as silicon dioxide, SiO2, on the substrate, and a gate electrode, such as polycrystalline silicon, on the gate dielectric.
As integrated circuit sizes and the sizes of the transistors thereon decrease, the gate drive current required to increase the speed of the transistor has increased. Because the drive current increases as the gate capacitance increases, and capacitance is inversely proportional to the gate dielectric thickness, decreasing the dielectric thickness is one method of increasing the drive current.
Attempts have been made to reduce the thickness of SiO2 gate dielectrics below 20 Å. However, it has been found that the use of thin SiO2 gate dielectrics below 20 Å often results in undesirable effects on gate performance and durability. For example, boron from a boron doped gate electrode can penetrate through a thin SiO2 gate dielectric into the underlying silicon substrate. Also, there is typically an increase in gate leakage, i.e., tunneling, with thin dielectrics that increases the amount of power consumed by the gate. Thin SiO2 gate dielectrics may be susceptible to hot carrier damage, in which high energy carriers traveling across the dielectric can damage or destroy the gate. Thin SiO2 gate dielectrics may also be susceptible to negative bias temperature instability (NBTI), wherein the threshold voltage or drive current drifts with operation of the gate.
One method that has been used to address the problems with thin SiO2 gate dielectrics is to incorporate nitrogen into the SiO2 layer to form a SiOxNy gate dielectric. Incorporating nitrogen into the SiO2 layer blocks boron penetration into the underlying silicon substrate and raises the dielectric constant of the gate dielectric, allowing the use of a thicker dielectric layer.
Heating a silicon oxide layer in the presence of ammonia (NH3) has been used to convert a SiO2 layer to a SiOxNy layer. However, the conventional methods of heating a silicon oxide layer in the presence of NH3 in a furnace have typically resulted in non-uniform incorporation of nitrogen across the SiO2 layer in different parts of the furnace due to air flow when the furnace is opened or closed. Additionally, oxygen or water vapor contamination of the SiO2 layer may block incorporation of nitrogen into the SiO2 layer.
Plasma nitriding (DPN) has also been used to convert a SiO2 layer to a SiOxNy layer. Gate stacks with a high PMOS drive current and a low gate leakage have been formed using plasma nitriding. However, attempts to form gate stacks with a high N-channel metal-oxide semiconductor (NMOS) drive current and a low gate leakage using plasma nitriding have been unsuccessful at less than 12 Å EOT (equivalent oxide thickness). For example, FIG. 1 shows that heating a silicon oxide layer in the presence of NH3 results in a higher NMOS drive current at a normalized voltage of the threshold voltage +0.75 V (Idsat(Vt+0.75V)) relative to NMOS gate leakage at a normalized voltage of the threshold voltage +1 V (Jg(Vt+1)) than plasma nitriding the silicon oxide layer. Additionally, FIG. 2 shows that plasma nitriding a silicon oxide layer results in a higher P-channel metal-oxide semiconductor (PMOS) drive current at a normalized voltage of the threshold voltage +0.75 V (Idsat(Vt+0.75V)) relative to NMOS gate leakage at a normalized voltage of the threshold voltage +1 V (Jg(Vt+1)) than heating the silicon oxide layer in the presence of NH3.
CMOS circuits typically contain both NMOS and PMOS devices. Thus, there remains a need for a method of depositing a SiOxNy gate dielectric that has a high drive current and low leakage current for both PMOS and NMOS devices.